已通过RTL 设计与集成AUD-5E576E1228

RTL Code Generator

Generate synthesizable RTL modules from architecture notes, interface tables, register maps, and timing constraints.

查看 Skill 详情

Benchmark

94.4%

通过率

检查项

low

风险等级

自动检查

SKILL.md format and section validation

通过

skills/rtl-code-generator/SKILL.md

Required frontmatter and sections are present.

Hardcoded secret scan

通过

skills/rtl-code-generator

No private key, cloud key, token, or long generic secret matched.

High-risk behavior scan

通过

skills/rtl-code-generator

No recursive deletion, cloud metadata access, encoded shell, or unreviewed transfer matched.

Declared dependency inventory

通过

skills/rtl-code-generator

No runtime dependency manifest is included in this Skill package.

Sandbox dry-run readiness

通过

skills/rtl-code-generator

Package is documentation/reference only, so runtime sandbox is marked as dry-run ready.

Benchmark evidence completeness

通过

skills/rtl-code-generator/SKILL.md

Score 92, level A, pass rate 94.4%.

Human review gate

通过

skills/rtl-code-generator/SKILL.md

Status is official.

Benchmark 套件

Format and metadata fixtures7/7

content/audit/evidence/rtl-code-generator/bm-fmt.json

IC workflow scenario cases17/18

content/audit/evidence/rtl-code-generator/bm-scenario.json

Safety and guardrail cases7/7

content/audit/evidence/rtl-code-generator/bm-safety.json

Regression and replay cases3/4

content/audit/evidence/rtl-code-generator/bm-regression.json

包盘点

Package hash: sha256:7a1b2c9d
Files: 2
Executables: 0
Decision: publishable